Short for translation look-aside buffer
, a table in the processor s memory
that contains information about the pages
in memory the processor has accessed recently. The table cross-references a program s virtual addresses
with the corresponding absolute addresses
memory that the program has most recently used. The TLB enables faster computing because it allows the address processing to take place independent of the normal address-translation pipeline
Also referred to as the address translation cache, a typical TLB contains anywhere from 64 to 256 entries.