Click here

pipeline burst cache

A type of memory cache built into many modern DRAM controller and chipset designs. Pipeline burst caches use two techniques - a burst mode that pre-fetches memory contents before they are requested, and pipelining so that one memory value can be accessed in the cache at the same time that another memory value is accessed in DRAM. The purpose of pipeline burst caches is to minimize wait states so that memory can be accessed as fast a possible by the microprocessor.

The term is often abbreviated as PBC.



Top Terms
  • 1

    Consumerization of IT

    Consumerization of IT is a phrase used to describe the cycle of information technology (IT) emerging in the consumer market then spreading to...

    Read more »

  • 2

    ERP - Enterprise Resource Planning

    Short for enterprise resource planning, ERP is business management software that allows an organization to use a system of integrated applications...

    Read more »

  • Click Here!

Connect with Webopedia

Did You Know? Archive »

  • Quick Reference Archive »